Novel 3-D structure for ultra high density flash memory with VRAT (Vertical-Recess-Array-Transistor) and PIPE (Planarized Integration on the same PlanE)

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2008, Pages 122-123

  Kim, Jiyoung ^a   Hong, Augustin J ^a   Ogawa, Masaaki ^a   Siguang, Ma ^a   Song, Emil B ^a   Lin, You Sheng ^b   Han, Jeonghee ^c   Chung, U In ^c   Wang, Kang L ^a  

^a Engineering IV   (United States)

^b UCLA Nanoelectronics Research Facility   (South Korea)

^c SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

OPTICAL DESIGN; PIPE; TECHNOLOGY;

3-D INTEGRATION; 3-D STRUCTURES; ADVANCED STRUCTURE; FLASH MEMORY CELLS; MEMORY DENSITY; ULTRA-HIGH DENSITY; VLSI TECHNOLOGIES;

FLASH MEMORY;

EID: 51949111083     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2008.4588587     Document Type: Conference Paper

References (3)

1. Kinam Kim et al., IEDM Tech. Dig., pp 27-30, 2007
2. Soon-Moon Jung et al., IEDM Tech. Dig., pp 37-40, 2006
3. H. Tanaka et al., Symp. on VLSI Tech. Dig., pp 14-15, 2007