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Volumn , Issue , 2008, Pages 227-230

Toward A mixed-signal reconfigurable ASIC for real-time activity recognition

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BIOSENSORS; DATA PROCESSING; ELECTRIC POWER SUPPLIES TO APPARATUS; LITHOGRAPHY; NETWORKS (CIRCUITS); NONMETALS; OPTICAL DESIGN; SENSORS; SILICON;

EID: 51949107797     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSMDBS.2008.4575060     Document Type: Conference Paper
Times cited : (8)

References (22)
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    • (2004) Physiological Measurement , vol.25
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  • 3
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    • (2007) IEEE Trans. on Biomedical Circuits and Systems , vol.1 , Issue.4 , pp. 235-241
    • Wang, L.1    Lo, B.2    Yang, G.Z.3
  • 6
    • 51949092694 scopus 로고    scopus 로고
    • http://www.coolfluxdsp.com/
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    • 51949107258 scopus 로고    scopus 로고
    • http://www.anadigm.com/
  • 9
    • 0028495381 scopus 로고
    • A neural network learning algorithm tailored for VLSI implementation
    • P. W. Hollis and J. J. Paulos, A neural network learning algorithm tailored for VLSI implementation, IEEE Trans. on Neural Networks, 5(5), pp. 784-791, 1994.
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    • Hollis, P.W.1    Paulos, J.J.2
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    • A CMOS classifier circuit using neural networks with novel architecture
    • M. Yildiz, S. Minaei, and I. C. Goknar, A CMOS classifier circuit using neural networks with novel architecture, IEEE Trans. on Neural Networks, 18(6), pp. 1845-1849, 2007.
    • (2007) IEEE Trans. on Neural Networks , vol.18 , Issue.6 , pp. 1845-1849
    • Yildiz, M.1    Minaei, S.2    Goknar, I.C.3
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    • Modified self-organizing feature map algorithms for efficient digital hardware implementation
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.