A 5GHz fully integrated super-regenerative receiver with on-chip slot antenna in 0.13μm CMOS

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2008, Pages 34-35

  Shi, Dan ^a   Behdad, Nader ^b   Chen, Jia Yi ^c   Flynn, Michael P ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

^b UNIVERSITY OF CENTRAL FLORIDA   (United States)

^c ZeroG Wireless Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANTENNA ACCESSORIES; ANTENNA ARRAYS; ANTENNAS; CONSERVATION; DIGITAL ARITHMETIC; EFFICIENCY; SLOT ANTENNAS; VLSI CIRCUITS;

DATA RATES; DATA SYNCHRONIZATION; DIE AREA; DIGITAL PLL; FULLY INTEGRATED; ON CHIPS; RECEIVER BASED; SINGLE CHIPS;

ENERGY EFFICIENCY;

EID: 51949105602     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2008.4585941     Document Type: Conference Paper

References (7)

1. A. Vouilloz et al., "A low-power CMOS super-regenerative receiver at 1 GHz," IEEE J. SSC, vol. 36, pp. 440-451, 2001.
2. B. Otis et al., "A 400μW-RX, 1.6mW-TX super-regenerative transceiver for wireless sensor networks," ISSCC Dig. Tech. Papers, 2005, pp. 396-606 Vol. 1.
3. J. Y. Chen et al., "A Fully Integrated Auto-Calibrated Super-Regenerative Receiver in 0.13μm CMOS," IEEE J. SSC, vol. 42, pp. 1976-1985, 2007.
4. D. Shi et al., "A Compact 5GHz Standing-Wave Resonator-based VCO in 0.13μm CMOS," IEEE RFIC Symp. Dig., 2007, pp. 591-594.
5. 2 Miniaturized X-Band On-Chip Slot Antenna in 0.13μm CMOS," IEEE RFIC Symp. Dig., 2007,
6. E. Vittoz et al., "CMOS analog integrated circuits based on weak inversion operations," IEEE J. SSC, vol. 12, pp. 224-231, 1977.
7. J. D. H. Alexander, "Clock recovery from random binary signals," Electronics Letters, vol. 11, pp. 541-542, 1975.