A 1Gbps mixed-signal analog front end for a 60GHz wireless receiver

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2008, Pages 156-157

  Sobel, David A ^a   Brodersen, Robert W ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

60GHz; Analog front end; Mixed signal

Indexed keywords

LOW POWER ELECTRONICS; VLSI CIRCUITS;

60GHZ; ANALOG FRONT END; CARRIER RECOVERY; LOW-POWER CONSUMPTION; MIXED SIGNAL; MULTIPATH DELAY SPREAD; WIRELESS COMMUNICATIONS; WIRELESS RECEIVERS;

SIGNAL RECEIVERS;

EID: 51949088649     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2008.4585988     Document Type: Conference Paper

References (5)

1. Rules to permit use of radio Frequencies Above 40GHz for New Radio Applications. FCC ET Docket No. 94-124, Dec. 1995.
2. C. H. Doan, et al. "A highly integrated 60GHz CMOS front-end receiver". 2007 ISSCC Dig. of Tech. Papers. p.440-441.
3. M. R. Williamson, et al. "Investigating the effects of antenna directivity on wireless indoor communication at 60GHz". Proceedings of the PIMRC Conference. 1997, pp. 635-639.
4. U. Mengali and A. D'Andrea. Synchronization Techniques for Digital Receivers. New York: Plenum Press, 1997.
5. P. Figueiredo, et al. "A 90nm CMOS 1.2V 6b 1GS/s two-step subranging ADC". 2006 ISSCC Dig. of Tech. Papers. p.568-569.