Improving energy efficiency of configurable caches via temperature-aware configuration selection

Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008

Volumn , Issue , 2008, Pages 363-368

  Noori, Hamid ^a   Goudarzi, Maziar ^b   Inoue, Koji ^b   Murakami, Kazuaki ^b  

^a Institute of Systems & Information Technologies/KYUSHU   (Japan)

^b KYUSHU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; CACHE MEMORY; CONSERVATION; EFFICIENCY; ELECTRIC POWER UTILIZATION; EMBEDDED SYSTEMS; INTEGRATED CIRCUITS; LEAKAGE CURRENTS; TECHNOLOGY;

ACTIVE POWER; CACHE SIZES; CONFIGURABLE; CONFIGURABLE CACHE; DATA CACHING; DIGITAL SYSTEMS; EFFECT OF TEMPERATURE; HIGHER TEMPERATURES; INSTRUCTION CACHES; LOW ENERGIES; TECHNOLOGY SCALING; TOTAL POWER CONSUMPTION; TOTAL POWER DISSIPATION; VLSI TECHNOLOGIES;

ENERGY EFFICIENCY;

EID: 51849158295     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2008.24     Document Type: Conference Paper

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