Verifying the authenticity of chip designs with the DesignTag system

2008 IEEE International Workshop on Hardware-Oriented Security and Trust, HOST

Volumn , Issue , 2008, Pages 59-64

  Kean, Tom ^a   McLaren, David ^a   Marsh, Carol ^a  

^a Algotronix Ltd   (United Kingdom)

Author keywords

Counterfeit chips; IP tagging; Security

Indexed keywords

COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; ELECTRIC CONDUCTIVITY; INTEGRATED CIRCUITS; INTELLECTUAL PROPERTY; PATENTS AND INVENTIONS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR MATERIALS; SUPPLY CHAINS;

CAD TOOLS; CHIP DESIGNS; COUNTERFEIT CHIPS; CRITICAL APPLICATIONS; ECONOMIC DAMAGES; EXTERNAL-; INTELLECTUAL PROPERTY CORES; IP TAGGING; SECURITY; SEMICONDUCTOR COMPANIES;

SEMICONDUCTOR DEVICES;

EID: 51849146248     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HST.2008.4559051     Document Type: Conference Paper

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