Application of negative group delay active circuits to reduce the 50% propagation delay of RC-line model

12th IEEE Workshop on Signal Propagation on Interconnects, SPI

Volumn , Issue , 2008, Pages

  Ravelo, Blaise ^a   Pérennec, André ^a   Roy, Marc Le ^a  

^a UNIVERSITÉ DE BRETAGNE OCCIDENTALE   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE NETWORKS; BEHAVIORAL RESEARCH; CIRCUIT SIMULATION; CRACK PROPAGATION; DELAY CIRCUITS; INTERCHANGES; NETWORKS (CIRCUITS);

ACTIVE CIRCUITS; ANALYTICAL EXPRESSIONS; CIRCUIT SIMULATORS; DIGITAL SIGNALS; GROUP DELAYS; HIGH FREQUENCIES; ON CHIPS; POTENTIAL APPLICATIONS; PROPAGATION DELAYS; SIGNAL PROPAGATION; SYNTHESIS METHODS; TIME DELAYING; TIME-DOMAIN SIMULATIONS; TRANSMISSION LINE MODEL;

ELECTRIC NETWORK ANALYSIS;

EID: 51849136626     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SPI.2008.4558347     Document Type: Conference Paper

References (12)

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5. B. Ravelo, A. Pérennec, M. Le Roy, "Equalization of Interconnect Propagation Delay with Negative Group Delay Active Circuits", 11th IEEE Workshop on Signal Propagation On Interconnects, Genova, Italy, May 2007, pp. 15-18.
6. B. Ravelo, A. Perennec, M. Le Roy, and Y. Boucher, "Active Microwave Circuit with Negative Group Delay", IEEE Microwave and Wireless Components Letters, Vol. 17, Issue 12, Dec. 2007, pp. 861-863.
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10. C. Chen, J. Lillis, S. Lin, and N. Chang, "Interconnect Analysis and Synthesis," New York: Wiley 2000.
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