Spin-MTJ based non-volatile flip-flop

2007 7th IEEE International Conference on Nanotechnology - IEEE-NANO 2007, Proceedings

Volumn , Issue , 2007, Pages 399-402

  Zhao, Weisheng ^a,b   Belhaire, Eric ^a   Chappert, Claude ^c  

^a IEEE

^b UNIVERSITÉ PARIS SACLAY   (France)

^c NONE

Author keywords

Flip flop; FPGA; High speed; Low power; Magnetic; MRAM; Non volatile; SMNFF; SOC; Spin MTJ

Indexed keywords

CELL MEMBRANES; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION LANGUAGES; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FLIP FLOP CIRCUITS; MAGNETIC DEVICES; MAGNETIC MATERIALS; MICROPROCESSOR CHIPS; MOSFET DEVICES; NANOTECHNOLOGY; NETWORKS (CIRCUITS); RANDOM ACCESS STORAGE; SEMICONDUCTOR JUNCTIONS; SPIN DYNAMICS; SWITCHING CIRCUITS; SWITCHING THEORY; TECHNOLOGY; TUNNEL JUNCTIONS; WAVEGUIDE JUNCTIONS;

CELL SURFACES; CMOS TECHNOLOGIES; FIELD PROGRAMMABLE GATE ARRAY; FLIP-FLOP; FPGA; HIGH SPEED; HIGH SPEEDS; INTERNATIONAL CONFERENCES; LOW POWER; LOW-POWER DISSIPATION; LOW-PROPAGATION; MAGNETIC; MAGNETIC TUNNEL JUNCTION; MAGNETIC-RAM; MEMORY CELLS; MRAM; NON-VOLATILE; NON-VOLATILITY; PICO SECONDS; SIMULATION MODELLING; SMNFF; SOC; SPIN-MTJ; SPIN-TRANSFER TORQUE; SPINTRONICS; ST MICROELECTRONICS; START UPS; SYSTEM-ON-CHIP; VERILOG-A LANGUAGE;

LOGIC CIRCUITS;

EID: 51849119169     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NANO.2007.4601218     Document Type: Conference Paper

References (12)

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