A neural stimulator output stage for dodecapolar electrodes

Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008

Volumn , Issue , 2008, Pages 487-490

  Soulier, F ^a   Lerat, J B ^a   Gouyet, L ^a   Bernard, S ^a   Cathebras G ^a  

^a LIRMM   (France)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; ELECTROLYSIS; FUNCTIONAL ELECTRIC STIMULATION; METALLIZING; STAGES; TECHNOLOGY;

ELECTRICAL STIMULATIONS; FUNCTIONAL ELECTRICAL STIMULATION; NERVOUS SYSTEMS; NEURAL STIMULATOR; OUTPUT STAGES; STIMULATION SITES; VLSI TECHNOLOGIES;

NEUROLOGY;

EID: 51849086337     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2008.84     Document Type: Conference Paper

References (7)

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