FSMD functional partitioning for low power

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 1999, Pages 22-28

  Hwang, Enoch ^a   Vahid, Frank ^a   Hsu, Yu Chin ^a  

^a University of California Riverside   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CUSTOM HARDWARES; DATA PATHS; FUNCTIONAL PARTITIONING; POWER REDUCTIONS; SHUT-DOWN TECHNIQUES; SUB-CIRCUITS; SYNTHESIS PROBLEMS; SYNTHESIS TOOL;

EXHIBITIONS;

EID: 51749104469     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1999.761092     Document Type: Conference Paper

References (11)

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3. A. Chandrakasan, T. Sheng, & R. Brodersen, "Low Power CMOS Digital Design," Journal of Solid State Circuits, Vol. 27, No. 4, pp. 473-484, April 1992.
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9. D. Gajski, F. Vahid, S. Narayan, and J. Gong, Specification and design of embedded systems, New Jersey, Prentice Hall, 1994.
10. A. V. Aho, R. Sethi, & J. D. Ullman, Compilers Principles, Techniques, and Tools, Addison-Wesley Publishing Company, California, 1988.
11. E. Hwang & F. Vahid, "Energy Estimation for FSMD Partitioning," UCR CS 98 06, University of California, Riverside.