Task partitioning algorithm for intra-task dynamic voltage scaling

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2008, Pages 1228-1231

  Oh, Seungyong ^a   Kim, Jungsoo ^a   Kim, Seonpil ^a   Kyung, Chong Min ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC VOLTAGE SCALING; INTERNATIONAL SYMPOSIUM; VOLTAGE SWITCHING;

AXIAL FLOW; BOOLEAN FUNCTIONS; ELECTRIC LOAD FORECASTING; TECHNICAL PRESENTATIONS;

ELECTRIC NETWORK ANALYSIS;

EID: 51749098528     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2008.4541646     Document Type: Conference Paper

References (8)

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3. S.Lee and T.Sakurai. "Run-time Voltage Hopping for Low-power Real-Time Systems", DAC, 2000
4. A. Azevedo, I. Issenin, R. Cornea, R. Gupta, N. Dutt, A. Veidenbaum, and A. Nicolau, "Profile-Based Dynamic Voltage Scheduling Using Program Checkpoints", DATE, 2002.
5. J. Seo, T. Kim, and K. Chung, "Profile-Based Optimal Intra-Task Voltage Scheduling for Hard Real-Time Applications", DAC, 2004.
6. D. Shin, S. Lee, J. Kim "Intra-Task voltage scheduling for low-energy hard real-time applications, IEEE Design & Test of computers.2001.
7. S. Hong, S. Yoo, H. Jin, K. Choi, J. Kong, S. Eo, "Runtime Distribution-Aware Dynamic Voltage Scaling", ICCAD, 2006.
8. ARM SoC Designer, available at http://www.arm.com/product/DevTools/ MaxSim.html