Asynchronous computing in sense amplifier-based pass transistor logic

Proceedings - International Symposium on Asynchronous Circuits and Systems

Volumn , Issue , 2008, Pages 105-115

  Liu, Tsung Te ^a   Alarcón, Louis P ^a   Pierson, Matthew D ^a   Rabaey, Jan M ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; TRANSISTORS;

ASYNCHRONOUS COMPUTING; ASYNCHRONOUS LOGIC; BUNDLED DATA; DESIGN AND IMPLEMENTATIONS; LOGIC ARCHITECTURE; LOGIC STRUCTURES; LOWER ENERGIES; PASS-TRANSISTOR LOGIC; SELF-TIMED; SENSE AMPLIFIER;

NETWORK ARCHITECTURE;

EID: 51749097573     PISSN: 26431394     EISSN: 26431483     Source Type: Conference Proceeding    
DOI: 10.1109/ASYNC.2008.23     Document Type: Conference Paper

References (8)

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