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Volumn , Issue , 2008, Pages 18-23

MIMO OFDM Physical layer real-time prototyping

Author keywords

ASIC; FPGA; MIMO; OFDM; W LAN

Indexed keywords

ASIC; FPGA; MIMO; OFDM; W-LAN;

EID: 51649089845     PISSN: 15253511     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (8)

References (12)
  • 2
    • 51649093361 scopus 로고    scopus 로고
    • Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications: Enhancements for Higher Throughput, IEEE Draft 802.11n/D2.05, Jul. 2007.
    • "Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications: Enhancements for Higher Throughput", IEEE Draft 802.11n/D2.05, Jul. 2007.
  • 3
    • 0035573869 scopus 로고    scopus 로고
    • Fast Fourier Transform for High Speed OFDM Wireless Multimedia System, IEEE 44th
    • Aug
    • A. Sadat, W.B. Mikhael, "Fast Fourier Transform for High Speed OFDM Wireless Multimedia System", IEEE 44th Midwest Symposium on Circuits and Systems, vol. 2, pp. 938-942, Aug. 2001.
    • (2001) Midwest Symposium on Circuits and Systems , vol.2 , pp. 938-942
    • Sadat, A.1    Mikhael, W.B.2
  • 4
    • 0032183752 scopus 로고    scopus 로고
    • A Simple Transmit Diversity Technique for Wireless Communications
    • Oct
    • S. Alamouti, "A Simple Transmit Diversity Technique for Wireless Communications", IEEE J. Select. Areas Commun., vol. 16, pp. 1451-1458, Oct. 1998.
    • (1998) IEEE J. Select. Areas Commun , vol.16 , pp. 1451-1458
    • Alamouti, S.1
  • 6
    • 0032023863 scopus 로고    scopus 로고
    • Space-Time Codes for High Data Rate Wireless Communication: Performance Criterion and Code Construction
    • Mar
    • V. Tarokh, N. Seshadri, and A. R. Calderbank, "Space-Time Codes for High Data Rate Wireless Communication: Performance Criterion and Code Construction", IEEE Trans. Inform. Theory, vol. 44, pp. 744-765, Mar. 1998.
    • (1998) IEEE Trans. Inform. Theory , vol.44 , pp. 744-765
    • Tarokh, V.1    Seshadri, N.2    Calderbank, A.R.3
  • 9
    • 51649101929 scopus 로고    scopus 로고
    • Synplify Premier: The Ultimate in FPGA Implementation and Debug
    • 20607SPR, Synplicity Inc
    • "Synplify Premier: The Ultimate in FPGA Implementation and Debug", 20607SPR, Synplicity Inc., www.synplicity.com, 2007.
    • (2007)
  • 10
    • 0026981415 scopus 로고
    • A 140-Mbps, 32-state, Radix-4 Viterbi Decoder
    • Dec
    • P.J. Black, T.H. Meng, "A 140-Mbps, 32-state, Radix-4 Viterbi Decoder", IEEE Journal of Solid-State Circuits, vol. 27, pp. 1877-1885, Dec. 1992.
    • (1992) IEEE Journal of Solid-State Circuits , vol.27 , pp. 1877-1885
    • Black, P.J.1    Meng, T.H.2
  • 11
    • 30344436225 scopus 로고    scopus 로고
    • Virtex-4 Family Overview
    • DS112v2.0, Jan
    • "Virtex-4 Family Overview", DS112v2.0, www.xilinx.com, Jan. 2007.
    • (2007)
  • 12
    • 51649104765 scopus 로고    scopus 로고
    • Realview Hardware Platforms
    • ARM DOI 0241-1/03.07, Mar
    • "Realview Hardware Platforms", ARM DOI 0241-1/03.07, www.arm.com, Mar. 2007.
    • (2007)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.