Evaluation of traffic pattern effect on power consumption in mesh and torus network-on-chips

2007 International Symposium on Integrated Circuits, ISIC

Volumn , Issue , 2007, Pages 512-515

  Koohi, S ^a   Mirza Aghatabar, M ^a   Hessabi, S ^a  

^a SHARIF UNIVERSITY OF TECHNOLOGY   (Iran)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK TOPOLOGY; ELECTRIC POWER UTILIZATION; INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; ROUTERS; TOPOLOGY;

FIGURES OF MERIT; TRAFFIC MODELLING;

COMPUTER NETWORKS;

EID: 51549102193     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISICIR.2007.4441911     Document Type: Conference Paper

References (10)

1. F. Moraes, N. Calazans, A. Mello, L. Moller, L. Ost, "HERMES: an Infrastructure for Low Area Overhead Packet-Switching Networks on Chip," Integration, the VLSI Journal, vol. 38, pp. 69-93, 2004.
2. L. Benini and G. de Micheli, "Networks-on-Chip: A new Paradigm for System on Chip Design," Design Automation and Test in Europe, IEEE computer, vol. 35, no. 1, pp. 70-78, January 2002.
3. J. Duato, S. Yalamanchili, and L. Ni, "Interconnection Networks - An Engineering Approach," Morgan Kaufmam, 2002.
4. Partha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Resve A. Saleh, "Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures," IEEE Trans. Computers, vol. 54, no. 8, pp 1025-1040, 2005.
5. T. Li, "Estimation of Power Consumption in Wormhole Routed Networks on Chip," Stockholm, Sweden, May. 2005.
6. Partha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Res Saleh: "Effect of Traffic Localization on Energy Dissipation in NoC-based Interconnect," ISCAS (2), pp 1774-1777, 2005.
7. United Microelectronics Corporation (UMC), http://www.umc.com/, Dec, 2006.
8. International Technology Roadmap for Semiconductor (ITRS), http://www.itrs.net/, Dec, 2006.
9. W. Hsh, "Performance issues in wire-limited hierarchical networks," PhD Thesis University of Illinois-Urbana Champaign, 1992.
10. K. Hwang, Advanced computer architecture: parallelism, scalability and programmability, McGraw-Hill (Ed.), 1993.