Roles of high-k and interfacial layers on TDDB reliability studied with HfAlOx/SiO2 stacked gate dielectrics

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2008, Pages 661-662

  Okada, Kenji ^a   Ota, Hiroyuki ^b   Hirano, Akito ^a   Ogawa, Arito ^a   Nabatame, Toshihide ^a   Toriumi, Akira ^b,c  

^a ASSOCIATION OF SUPER ADVANCED ELECTRONICS TECHNOLOGIES ASET   (Japan)

^b NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

^c UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 51549097372     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RELPHY.2008.4558976     Document Type: Conference Paper

References (9)

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5. K. Okada et al., VLSI Technol. (2007) 34.
6. T. Nabatame et al., VLSI Technol. (2003) 25.
7. T. Yamaguchi et al., IRPS (2003) 34.
8. K. Okada et al., VLSI Technol. (2005) 166.
9. K. Okada et al., IRPS (2006) 189.