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Volumn , Issue , 2008, Pages 217-222

Speedpath prediction based on learning from a small set of examples

Author keywords

Learning; Speedpath; Timing analysis

Indexed keywords

DESIGN AUTOMATION CONFERENCE; LEARNING; SPEEDPATH; TIMING ANALYSIS;

EID: 51549088664     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2008.4555811     Document Type: Conference Paper
Times cited : (39)

References (11)
  • 2
    • 50649098414 scopus 로고    scopus 로고
    • Analyzing the risk of timing modeling based on path delay test
    • P. Bastani, B. Lee, L. Wang, M. Abadir, "Analyzing the risk of timing modeling based on path delay test," Proc. ITC, 2007.
    • (2007) Proc. ITC
    • Bastani, P.1    Lee, B.2    Wang, L.3    Abadir, M.4
  • 3
    • 34547355933 scopus 로고    scopus 로고
    • Design-silicon timing correlation - a data mining perspective
    • Li-C. Wang, P. Bastani, M. Abadir, "Design-silicon timing correlation - a data mining perspective," Proc. DAC, 2007.
    • (2007) Proc. DAC
    • Li-C1    Wang2    Bastani, P.3    Abadir, M.4
  • 4
    • 34547245531 scopus 로고    scopus 로고
    • Silicon Speedpath Measurement and Feedback into EDA flows
    • K. Killpack, C. Kashyap, E. Chiprout, "Silicon Speedpath Measurement and Feedback into EDA flows," Proc. DAC, 2007.
    • (2007) Proc. DAC
    • Killpack, K.1    Kashyap, C.2    Chiprout, E.3
  • 5
    • 51549093248 scopus 로고    scopus 로고
    • Silicon Debug: What Do You Do When Your ASIC Does Not Work as Fast as Expected?
    • B. Gottlieb, et al, "Silicon Debug: What Do You Do When Your ASIC Does Not Work as Fast as Expected?" Proc. DAC, 2004.
    • (2004) Proc. DAC
    • Gottlieb, B.1
  • 6
    • 4444374515 scopus 로고    scopus 로고
    • Statistical Gate Delay Model Considering Multiple Input Switching
    • A. Agarwal, D. Blaauw, and F. Dartu, "Statistical Gate Delay Model Considering Multiple Input Switching," Proc. DAC, 2004.
    • (2004) Proc. DAC
    • Agarwal, A.1    Blaauw, D.2    Dartu, F.3
  • 9
    • 34547323629 scopus 로고    scopus 로고
    • Power Grid Physics and Implications for CAD
    • Sanjay Pant, Eli Chiprout, "Power Grid Physics and Implications for CAD," Proc. DAC 2006.
    • (2006) Proc. DAC
    • Pant, S.1    Chiprout, E.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.