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Volumn , Issue , 2004, Pages 148-151

ASIC design of a kohonen neural network microchip

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER NETWORKS; DESIGN; ELECTRIC CONDUCTIVITY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); IMAGE CLASSIFICATION; IMAGE SEGMENTATION; NEURAL NETWORKS; PROCESS ENGINEERING; SEMICONDUCTOR MATERIALS;

EID: 51349163130     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (12)

References (7)
  • 3
    • 0026285272 scopus 로고    scopus 로고
    • R. Togneri, Y. Attikiouzel, Parallel implementation of the Kohonen algorithm on Transputer, lnt. Joint Conf. on Neural Networks(IJCNN91) 2 Singapore, 1991.
    • R. Togneri, Y. Attikiouzel, "Parallel implementation of the Kohonen algorithm on Transputer", lnt. Joint Conf. on Neural Networks(IJCNN91) Vol.2 Singapore, 1991.
  • 4
    • 0026868201 scopus 로고    scopus 로고
    • M. Melton, Tan Phan, D. Reeves, D. Van den Bout, The TlnMANN VLSI Chip, IEEE Trans. on Neural Networks, 3, No. 3, 1992.
    • M. Melton, Tan Phan, D. Reeves, D. Van den Bout, "The TlnMANN VLSI Chip", IEEE Trans. on Neural Networks, Vol.3, No. 3, 1992.
  • 5
    • 0023983407 scopus 로고
    • The 'neural' phonetic typewriter
    • T.Kohonen, "The 'neural' phonetic typewriter", Computer, 1988.
    • (1988) Computer
    • Kohonen, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.