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Volumn , Issue , 2008, Pages 12-17

Electromigration of Cu-Sn-Cu micropads in 3D interconnect

Author keywords

3D integrated circuit; 3D interconnect; Electromigration; Failure analysis

Indexed keywords

COMPUTER NETWORKS; COPPER; DIES; ELECTROMIGRATION; INTERCONNECTION NETWORKS; MECHANISMS; SAFETY FACTOR; TIN;

EID: 51349121679     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2008.4549943     Document Type: Conference Paper
Times cited : (33)

References (14)
  • 2
    • 33646236322 scopus 로고    scopus 로고
    • Three-dimensional wafer stacking via Cu-Cu bonding integrated with 65-nm strained-Si/low-k CMOS technology
    • . P. R. Morrow, C.-M. Park, S. Ramanathan, M. J. Kobrinsky, and M. Harmes, "Three-dimensional wafer stacking via Cu-Cu bonding integrated with 65-nm strained-Si/low-k CMOS technology", IEEE Electron Dev Lett., Vol. 27, No. 5, (2006), pp. 335-337.
    • (2006) IEEE Electron Dev Lett , vol.27 , Issue.5 , pp. 335-337
    • Morrow, P.R.1    Park, C.-M.2    Ramanathan, S.3    Kobrinsky, M.J.4    Harmes, M.5
  • 11
    • 0036892397 scopus 로고    scopus 로고
    • Electromigration Reliability Issues in Dual-Damascene Cu Interconnections
    • E. T. Ogawa, K.-D. Lee, V. A. Blaschke, and P. S. Ho, "Electromigration Reliability Issues in Dual-Damascene Cu Interconnections," IEEE Transactions On Reliability, Vol. 51, No. 4, (2002), pp.403-419.
    • (2002) IEEE Transactions On Reliability , vol.51 , Issue.4 , pp. 403-419
    • Ogawa, E.T.1    Lee, K.-D.2    Blaschke, V.A.3    Ho, P.S.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.