An IP core and GUI for implementing multilayer perceptron with a fuzzy activation function on configurable logic devices

Journal of Universal Computer Science

Volumn 14, Issue 10, 2008, Pages 1678-1694

  Rosado Muñoz, Alfredo ^a   Soria Olivas, Emilio ^a   Gomez Chova, Luis ^a   Francés, Joan Vila ^a  

^a UNIVERSITY OF VALENCIA   (Spain)

Author keywords

Configurable hardware; FPGA; Fuzzy logic; IP core; Multilayer perceptron; Neural networks; Programmable logic; VHDL

Indexed keywords

EID: 51049121565     PISSN: 0958695X     EISSN: 09486968     Source Type: Journal    
DOI: None     Document Type: Article

References (19)

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