Runtime adaptive multi-processor system-on-chip: RAMPSoC

IPDPS Miami 2008 - Proceedings of the 22nd IEEE International Parallel and Distributed Processing Symposium, Program and CD-ROM

Volumn , Issue , 2008, Pages

  Göhringer, Diana ^a   Hübner, Michael ^b   Schatz, Volker ^a   Becker, Jürgen ^b  

^a FRAUNHOFER GESELLSCHAFT   (Germany)

^b UNIVERSITY OF KARLSRUHE   (Germany)

Author keywords

FPGA; Multiprocessor system; Reconfigurable hardware; Run time adaptive system

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTATION THEORY; COMPUTER NETWORKS; DISTRIBUTED PARAMETER NETWORKS; ELECTRON BEAM LITHOGRAPHY; FAULT TOLERANCE; INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; QUALITY ASSURANCE; RELIABILITY; SYSTEMS ANALYSIS;

DEGREE OF FREEDOM; FPGA; MULTIPROCESSOR SYSTEM; RECONFIGURABLE HARDWARE; RUN-TIME ADAPTIVE SYSTEM;

COMPUTER SYSTEMS;

EID: 51049114710     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2008.4536503     Document Type: Conference Paper

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