Low-complexity policies for energy-performance tradeoff in chip-multi-processors

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 16, Issue 9, 2008, Pages 1243-1248

  Elyada, Avshalom ^a   Ginosar, Ran ^a   Weiser, Uri ^a  

^a TECHNION ISRAEL INSTITUTE OF TECHNOLOGY   (Israel)

Author keywords

Chip multi processor (CMP); Dynamic voltage scaling; Low power; Slack utilization

Indexed keywords

CHLORINE COMPOUNDS; CONSERVATION; COST EFFECTIVENESS; ENERGY EFFICIENCY; ENERGY POLICY; MULTIPROCESSING SYSTEMS; NANOTECHNOLOGY; WIRELESS TELECOMMUNICATION SYSTEMS;

CHIP-MULTI-PROCESSOR (CMP); DYNAMIC FREQUENCIES; DYNAMIC VOLTAGE SCALING; ENERGY CONSUMPTION; ENERGY-EFFICIENT; HEURISTIC POLICIES; IN-CHIP; LOW POWER; LOW-COMPLEXITY; MULTI PROCESSORS; MULTI-TASK; PERFORMANCE REQUIREMENTS; PERFORMANCE TRADE OFFS; PROCESSING ELEMENTS; REDUCING ENERGY; SAVE ENERGY; SLACK UTILIZATION; VOLTAGE SCALING;

ENERGY CONSERVATION;

EID: 50549085883     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2008.2000867     Document Type: Article

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