Low-k properties and integration processes enabling reliable interconnect scaling to the 32 nm technology node

2006 International Interconnect Technology Conference, IITC

Volumn , Issue , 2006, Pages 42-44

  Ikeda, A ^b   Travaly, Y ^a   Humbert, A ^c   Hoofman, R J O M ^c   Li, Y L ^d   Tokei Zs ^a   Iacopi, F ^a   Michelon, J ^c   Bruynseraede, C ^a   Willegems, M ^a   Hendrickx, D ^a   Van Aelst, J ^a   Struyf, H ^a   Versluijs, J ^a   Heylen, N ^a   Carbonell, L ^a   Richard, O ^a   Bender, H ^a   Kaiser, M ^c   Weemaes, R G R ^c   Verheyden, G ^c   Kemeling, N ^e   Fukazawa, A ^f   Matsuki, N ^f   Sprey, H ^e   Ciofi, I ^a   Beyer, G ^a   Van Hove, M ^a   more..

^a IMEC   (Belgium)

^b IMEC for Matsushita Electric Co Ltd

^c PHILIPS RESEARCH LABORATORIES   (Netherlands)

^d UNIVERSITY OF LEUVEN   (Belgium)

^e ASM BELGIUM   (Belgium)

^f ASM Belgium ^*

Author keywords

[No Author keywords available]

Indexed keywords

32 NM TECHNOLOGY; DIELECTRIC ETCHES; DIFFUSIVITY; DUAL DAMASCENE INTERCONNECTS; HARD MASKS; INTEGRATION PROCESSES; INTEGRATION SCHEMES; INTERCONNECT PERFORMANCE; INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE; K VALUES; LOW DAMAGES; LOW- K FILMS; SIDEWALL PROTECTION; SINGLE DAMASCENE; TIME-DEPENDENT DIELECTRIC BREAKDOWN LIFETIME; ULK INTERCONNECTS;

ELECTRIC BREAKDOWN; METALS; OPTICAL DESIGN; OPTICAL INTERCONNECTS; TECHNOLOGY;

DIELECTRIC MATERIALS;

EID: 50249187203     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.2006.1648641     Document Type: Conference Paper

References (4)

1. O. Hinsinger, et al., Technical Digest. IEDM 2004.
2. H. Struyf, et al., Proceedings of the IITC2005.
3. Y. Travaly, et al. Proceedings of the AMC2005.
4. J. Van Aelst, et al., Int. symp. on dry process, DPS 2004