Numerical implementation of low field resistance drift for phase change memory simulations

2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, Proceedings, NVSMW/ICMTD

Volumn , Issue , 2008, Pages 39-42

  Redaelli, A ^a   Pirovano, A ^a   Locatelli, A ^a   Pellizzer, F ^a  

^a STMICROELECTRONICS   (Italy)

Author keywords

Amorphous GST; Low field resistance drift; Phase Change Memories (PCM)

Indexed keywords

CHALCOGENIDES; DATA STORAGE EQUIPMENT; ELECTRIC CONDUCTIVITY; INORGANIC COMPOUNDS; MACHINE DESIGN; PULSE CODE MODULATION; SEMICONDUCTOR MATERIALS; SEMICONDUCTOR STORAGE; TECHNOLOGY;

AMORPHOUS GST; AMORPHOUS PHASE; APPLICATION FIELDS; DEFECT FORMATION; DEVICE OPERATIONS; DRIFT COEFFICIENT; DRIFT MODELING; ELECTRICAL BEHAVIORS; ELECTRICAL DATA; INTERNATIONAL CONFERENCES; LEADING EDGES; LOW FIELD RESISTANCE DRIFT; LOW FIELDS; MEMORY DESIGNS; MEMORY TECHNOLOGY; NON-VOLATILE; NUMERICAL IMPLEMENTATION; PHASE CHANGE MEMORIES (PCM); PHASE-CHANGE MEMORIES; PHYSICAL MECHANISMS; QUANTITATIVE AGREEMENT; RESISTANCE VALUES; SEMICONDUCTOR MEMORIES;

PHASE CHANGE MEMORY;

EID: 50249147884     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NVSMW.2008.17     Document Type: Conference Paper

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