A power MOSFET model based on a lumped - Charge approach

Proceedings of the IEEE Workshop on Computers in Power Electronics, COMPEL

Volumn , Issue , 1992, Pages 165-171

  Budihardjo, Irwan ^a   Kongsang, Boontum ^a,b   Lauritzen, P O ^a  

^a UNIVERSITY OF WASHINGTON   (United States)

^b The Royal Thai Navy   (Thailand)

Author keywords

[No Author keywords available]

Indexed keywords

EQUIVALENT CIRCUITS;

LOW-VOLTAGE DEVICES; LUMPED-CHARGE; MEASURED RESULTS; MOSFET MODELING; PHYSICAL POWER; SABER SIMULATOR; SIMULATED RESULTS; TERMINAL VOLTAGES;

POWER MOSFET;

EID: 50249122560     PISSN: 10935142     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CIPE.1992.247305     Document Type: Conference Paper

References (6)

1. R. S. Scott, G. A. Franz. "An accurate model for Power DMOSFET including interelectrode capacitance", 1990 PESC Conference Proceeding, pp 113-119.
2. Chi Kang Ong, Peter. O. Lauritzen and Irwan Budihardjo, "A mathematical model for power MOSFET capacitances", IEEE PESC conference, June 1991
3. R. Beaufoy, J. J. Sparkes. "The junction transistor as a charge-controlled device", A. T. E. Journal, vol. 13, October 1957. pp 310-327.
4. J. G. Linvill & J. F. Gibbons. Transistors and Active Circuit. McGraw-Hill. 1961.
5. Y. P. Tsividis, "Operation and modeling of THE MOS TRANSISTOR". pp 468-481. McGraw-Hill. 1987
6. P. O. Lauritzen, Cliff, L. Ma, "A Simple Diode with Reverse Recovery", IEEE transaction on Power Electronics. vol. 6. no. 2. April, 1991.