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Volumn , Issue , 2006, Pages 4923-4928
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Reusable VHDL architectures for induction motor PWM vector control, targeting FPGAs
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Author keywords
[No Author keywords available]
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Indexed keywords
AC MOTORS;
COMPUTER AIDED DESIGN;
COMPUTER SIMULATION;
COMPUTER SOFTWARE REUSABILITY;
CONCURRENCY CONTROL;
CONCURRENT ENGINEERING;
CONTROL SYSTEM ANALYSIS;
DIGITAL ARITHMETIC;
ELECTRONICS INDUSTRY;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
INDUCTION MOTORS;
INDUSTRIAL ELECTRONICS;
INTEGRATED CIRCUITS;
JITTER;
MOTORS;
PLANNING;
SOFTWARE DESIGN;
STRATEGIC PLANNING;
VECTORS;
ANNUAL CONFERENCE;
CONTROL STRATEGIES;
CONTROLLER DESIGNS;
DESIGN REUSABILITY;
DEVELOPMENT TIME;
DIGITAL CONTROLLER DESIGNS;
DIGITAL CONTROLLERS;
FPGA IMPLEMENTATIONS;
HARDWARE-SOFTWARE CO-DESIGN;
HOLISTIC ANALYSIS;
IP CORES;
NEW APPROACHES;
SHORT TIME;
SYSTEM MODELLING;
VECTOR CONTROL SYSTEMS;
VECTOR CONTROLS;
VERY HIGH SPEED INTEGRATED CIRCUIT HARDWARE DESCRIPTION LANGUAGE;
COMPUTER HARDWARE DESCRIPTION LANGUAGES;
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EID: 50249098553
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/IECON.2006.347620 Document Type: Conference Paper |
Times cited : (2)
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References (10)
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