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Volumn , Issue , 2006, Pages 219-222
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Root cause mechanism for delamination/cracking in stacked die chip scale packages
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Author keywords
[No Author keywords available]
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Indexed keywords
DELAMINATION;
DIES;
ELECTRIC CONDUCTIVITY;
ELECTRONICS ENGINEERING;
FAILURE ANALYSIS;
FLIP CHIP DEVICES;
HYDROSTATIC PRESSURE;
MANUFACTURE;
QUALITY ASSURANCE;
RELIABILITY;
SEMICONDUCTOR MATERIALS;
STEEL SHEET;
SUBSTRATES;
VAPOR PRESSURE;
CHIP-SCALE PACKAGING;
COHESIVE FAILURES;
DIFFUSIVITY;
INTERFACIAL DELAMINATION;
INTERNATIONAL SYMPOSIUM;
KEY PARAMETERS;
MATE RIAL PROPERTIES;
MATERIAL CHARACTERIZATIONS;
MOISTURE UPTAKE;
PACKAGE PERFORMANCE;
ROOT CAUSE ANALYSIS;
ROOT CAUSES;
SEMICONDUCTOR MANUFACTURING;
SUBSTRATE THICKNESSES;
CHIP SCALE PACKAGES;
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EID: 50249094598
PISSN: 1523553X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ISSM.2006.4493066 Document Type: Conference Paper |
Times cited : (13)
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References (4)
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