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Volumn , Issue , 2007, Pages 1697-1701
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DSP implementation of three-phase PLL using modified synchronous reference frame
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Author keywords
[No Author keywords available]
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Indexed keywords
CHANNEL CODING;
DIGITAL SIGNAL PROCESSORS;
ELECTRONICS INDUSTRY;
PHASE LOCKED LOOPS;
TRANSIENT ANALYSIS;
ANNUAL CONFERENCE;
DIGITAL PLL;
DSP IMPLEMENTATIONS;
FAST TRANSIENT RESPONSE;
GRID DISTURBANCE;
GRID-CONNECTED;
NEW ALGORITHM;
NOISE-TOLERANCE;
OUTPUT SIGNALS;
PI CONTROLLERS;
ROBUST OPERATION;
SYNCHRONOUS REFERENCE FRAME;
TRANSIENT RESPONSES;
INDUSTRIAL ELECTRONICS;
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EID: 49949096307
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/IECON.2007.4460168 Document Type: Conference Paper |
Times cited : (15)
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References (9)
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