A clockless ADC/DSP/DAG system with activity-dependent power dissipation and no aliasing

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages 550-552

  Schell, Bob ^a   Tsividis, Yannis ^a  

^a Och Spine at New York Presbyterian Hospitals   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS; CONTINUOUS TIME SYSTEMS;

90-NM CMOS; ACTIVITY-DEPENDENT; ALIASING; CONTINUOUS-TIME; IN-BAND;

ELECTRIC LOSSES;

EID: 49549121622     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523301     Document Type: Conference Paper

References (5)

1. Y. Tsividis, "Digital Signal Processing in Continuous Time: a Possibility for Avoiding Aliasing and Reducing Quantization Error," Proc. IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, vol. II, pp. 589-592, Montreal, May 2004.
2. Z. Zhao, V. Smolyakov, and A. Prodic, "Continuous-Time Digital Signal Processing Based Controller for High-Frequency DC-DC Converters," IEEE Applied Power Electronics Conf., pp. 882-886, Anaheim, Feb. 2007.
3. Y. W. Li, K. L. Shepard, and Y. P. Tsividis, "A Continuous-Time Programmable Digital FIR Filter," IEEE J. Solid State Circuits, vol. 41, no. 11, pp. 2512-2520, Nov. 2006.
4. E. Allier, G. Sicard, L. Fesquet, and M. Renaudin, "A New Class of Asynchronous A/D Converters Based on Time Quantization," Proc. IEEE Int. Syrup. On Asynchronous Circuits and Systems, pp. 196-205, Vancouver, May 2003.
5. G. Kim, M.-Y Kim, B.-S. Chang, and W. Kim, "A Low-Voltage, Low-Power CMOS Delay Element," IEEE J. Solid-State Circuits, vol. 31, no. 7, pp. 966-971, Jul. 1996.