Non-gaussian statistical timing models of die-to-die and within-die parameter variations for full chip analysis

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2008, Pages 292-297

  Homma, Katsumi ^a   Nitta, Izumi ^a   Shibuya, Toshiyuki ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; INDUSTRIAL ENGINEERING; INTEGRATED CIRCUITS; STATISTICAL METHODS; TIME MEASUREMENT; TIMING CIRCUITS;

CHIP DESIGNS; CIRCUIT DELAYS; DELAY DISTRIBUTIONS; DESIGN AUTOMATION CONFERENCE; NON-GAUSSIAN; PARAMETER VARIATIONS; PROCESS PARAMETER VARIATIONS; SOUTH PACIFIC; STATISTICAL TIMING; STATISTICAL TIMING ANALYSIS; WITHIN-DIE; WITHIN-DIE PARAMETER VARIATIONS;

DIES;

EID: 49549097560     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2008.4483961     Document Type: Conference Paper

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