A 52GHz phased-array receiver front-end in 90nm digital CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages 184-186

  Scheir, K ^a,b   Bronckers, S ^a,b   Borremans, J ^a,b   Wambacq, P ^a,b   Rolain, Y ^b  

^a IMEC   (Belgium)

^b VRIJE UNIVERSITEIT BRUSSEL   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

BEAM FORMING NETWORKS; CMOS INTEGRATED CIRCUITS;

ANTENNA PATH; CONVERSION GAIN; DIGITAL CMOS; HOMODYNE RECEIVER; PHASE SELECTOR; PHASED ARRAY RECEIVER;

ANTENNA PHASED ARRAYS;

EID: 49549084185     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523118     Document Type: Conference Paper

References (4)

1. A. Natarajan, A. Komijani, X. Guan, A. Babakhani and A. Hajimiri, "A77-GHz Phased-Array Transceiver With On-Chip Antennas in Silicon: Transmitter and Local LO-Path Phase Shifting," IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2807-2819, Dec. 2006.
2. B. Razavi, "A 60-GHz CMOS Receiver Front-End," IEEE J. Solid-State Circuits, vol. 41, no. 1, pp. 17-22, Jan. 2006.
3. F. Ellinger and H. Jackel, "38-43 GHz Quadrature VCO on 90 nm VLSI CMOS with feedback frequency tuning," IEEE MTT-S Intl. Microwave Syrup. Digest, June 2005.
4. B. Razavi, "A mm-Wave CMOS Heterodyne Receiver with On-Chip LO and Divider," ISSCC Dig. Tech. Papers, pp. 188-189, Feb. 2007.