Imprecise data computation for high performance asynchronous processors

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 2001-January, Issue , 2001, Pages 261-266

  Lee, Jeong Gun ^a   Kim, Euiseok ^a   Lee, Dong Ik ^a  

^a Gwangju Institute of Science and Technology (GIST)   (South Korea)

Author keywords

Computational modeling; Computer aided instruction; Computer architecture; Concurrent computing; Counting circuits; Delay; High performance computing; Integrated circuit modeling; Microprocessors; Real time systems

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER AIDED INSTRUCTION; COUNTING CIRCUITS; DATA HANDLING; DELAY CIRCUITS; DIGITAL SIGNAL PROCESSORS; INTERACTIVE COMPUTER SYSTEMS; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; PROGRAM PROCESSORS; REAL TIME SYSTEMS; SIGNAL PROCESSING;

COMPUTATIONAL MODEL; CONCURRENT COMPUTING; DELAY; HIGH PERFORMANCE COMPUTING; INTEGRATED CIRCUIT MODELING;

COMPUTER ARCHITECTURE;

EID: 4944248383     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2001.913316     Document Type: Conference Paper

References (5)

1. D.W. Wall, "Limits of Instruction-Level Parallelism," Research Rep. 93/6, Western Research Laboratory, Digital Equipment Corp.(November).
2. K.-J. Lin and S. Natarajan, "Expressing and Maintaining Timing Constraints in Flex," In Proceedings of 9th IEEE Real-Time System Symposium, no.894, pp.96-105, 1988.
3. Israel Koren, "Computer Arithmetic Algorithms," Prentice-Hall International Editions, 1993.
4. S. Hauck, "Asynchronous Design Methodologies: an Overview," Proceedings of the IEEE, vol.83, no.1, pp.69-93, 1995.
5. J. G. Lee, E. S. Kim, and D.-I. Lee, "Imprecise Data Computation for Asynchronous Processors," Technical Report KJ-CSRL-00-01, KwangJu Institute of Science and Technology, 2000.