SystemC model of a MPEG-2 DVB-T bit-rate measurement architecture for FPGA implementation

Proceedings of the International Workshop on Rapid System Prototyping

Volumn , Issue , 2004, Pages 157-163

  Tanougast, C ^a   Berviller, Y ^a   Mannino, C ^a   Rabah, H ^a   Janiaut, M ^a   Weber, S ^a  

^a INSTITUT JEAN LAMOUR   (France)

Author keywords

[No Author keywords available]

Indexed keywords

BIT ERROR RATE; COMPUTER HARDWARE; COMPUTER SOFTWARE; DATA ACQUISITION; DIGITAL TELEVISION; FIELD PROGRAMMABLE GATE ARRAYS; PARAMETER ESTIMATION; QUALITY OF SERVICE; REAL TIME SYSTEMS;

BIT-RATE MEASUREMENT; DIGITAL HARDWARE; REAL TIME MEASUREMENT; SYSTEMC MODEL;

COMPUTER PROGRAMMING LANGUAGES;

EID: 4944233125     PISSN: 10746005     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

1. S. Swan, «An Introduction to System Level Modeling in SystemeC 2. 0» Cadence Design Systems, Inc. May 2001.
2. S. Edwards, «Languages for Embedded Systems», Kluwer, 2000.
3. N. Agliada and al. "On the reuse of VHDL Modules into SystemC Designs", Proc. IEEE Forum on Design Languages (FDL), Lyon, France 2001.
4. AD954, «MPEG Portable analyser», Tektronix, 2001.
5. AD953_II, «MPEG Test System», Tektronix, 2002.
6. MP2TSA, «MPEG-2 Transport Stream Analyzer», Manzanita, 2003.
7. ETSI TR 101 290 v1.2.1 (2001-05), «Digital Video Broadcasting (DVB); Measurement guidelines for DVB systems», http://www.etsi.org, mai 2001.
8. «SystemC, User's Guide», 2002. www.systemc.org.
9. «Nepsys User's Guide», Prosilog, 2002 www.prosilog.com