On the use of the thermal step method as a tool for characterizing thin layers and structures for micro and nano-electronics

Journal of Optoelectronics and Advanced Materials

Volumn 6, Issue 3, 2004, Pages 1089-1096

  Notingher Jr , P ^a   Agnel, S ^a   Fruchier, O ^a   Toureille, A ^a   Rousset, B ^b   Sanchez, J L ^b  

^a UNIV MONTPELLIER   (France)

^b Laboratory for Analysis and Architecture of System   (France)

Author keywords

MOS structure; Nano electronics; Thermal step method

Indexed keywords

CAPACITANCE; ELECTRIC CHARGE; ELECTRIC POTENTIAL; INSULATING MATERIALS; NANOTECHNOLOGY; SHORT CIRCUIT CURRENTS; SILICON; SUBSTRATES;

CAPACITANCE-VOLTAGE (C-V) MEASUREMENTS; MOS STRUCTURE; NANO-ELECTRONICS; THERMAL STEP METHOD;

MOS DEVICES;

EID: 4944222074     PISSN: 14544164     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Conference Paper

References (6)

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