Reduction of output capacitance in dc-dc converters using anticipated load transients

Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC

Volumn , Issue , 2008, Pages 818-823

  Khaligh, Alireza ^a,b   Chapman, Patrick ^a,c  

^a IEEE

^b Illinois Institute of Technology   (United States)

^c University of Illinois at Urbana Champaign   (United States)

Author keywords

Anticipatory control; dc dc converter; Load transient analysis; Microprocessor; Voltage regulator module (VRM)

Indexed keywords

ANTICIPATORY CONTROL; CONTROL STRATEGIES; DC CONVERTERS; DC-DC CONVERTER; HIGH CURRENTS; LOAD TRANSIENT ANALYSIS; LOAD TRANSIENTS; LOW VOLTAGES; MICROPROCESSOR; MICROPROCESSOR APPLICATIONS; OUTPUT CAPACITANCE; OUTPUT VOLTAGE RIPPLE; OUTPUT VOLTAGES; POWER SUPPLIES; VOLTAGE REGULATOR MODULE (VRM);

CAPACITANCE; CONTROL SYSTEM STABILITY; DC-DC CONVERTERS; DYNAMIC RESPONSE; EXHIBITIONS; POWER CONVERTERS; TRANSIENTS;

POWER ELECTRONICS;

EID: 49249084108     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APEC.2008.4522815     Document Type: Conference Paper

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