A model for MOS gate stack quality evaluation based on the gate current 1/f noise

ULIS 2008 - 9th International Conference on ULtimate Integration of Silicon

Volumn , Issue , 2008, Pages 141-144

  Magnone, P ^a   Crupi, F ^a   Iannaccone, G ^b   Giusi, G ^a   Pace, C ^a   Simoen, E ^c   Claeys, C ^c,d  

^a UNIVERSITY OF CALABRIA   (Italy)

^b UNIVERSITY OF PISA   (Italy)

^c IMEC   (Belgium)

^d UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

LOGIC GATES; NONMETALS;

1 / F NOISE; ANALYTICAL MODELLING; FIGURE OF MERIT; GATE CURRENTS; GATE STACKS; INTERNATIONAL CONFERENCES; MOS GATES; MOS STRUCTURES; NOISE PARAMETERS; PHYSICAL QUANTITIES; QUALITY EVALUATION; TRAP DENSITIES;

SILICON;

EID: 49049113524     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ULIS.2008.4527159     Document Type: Conference Paper

References (9)

1. D.K. Schroder, "Semiconductor material and device characterization", John Wiley & Sons, 2006.
2. G. Groeseneken et al., "A reliable approach to charge-pumping measurements in MOS transistors", IEEE Trans. Electron Devices, vol. 31, n. 1, pp. 42-53, 1984.
3. R. Jayaraman et al., "A 1/f noise technique to extract the oxide trap density near the conduction band edge of silicon", IEEE Trans. Electron Devices, vol. 36, n. 9, pp. 1773-1782, 1989.
4. S. Christensson et al., "Low frequency noise in MOS transistors - I Theory", Solid-Sate Electronics, vol. 11, pp. 797-812, 1968.
5. A. Van der Ziel, "Noise in solid state devices and circuits", Wiley, New York, 1986.
6. F. Crupi et al., "Analytical model of the gate current 1/f noise - Part I: Theory and experiments", submitted for IEEE Trans. Electron Devices.
7. P. Magnone et al., "Analytical model of the gate current 1/f noise - Part II: The gate noise parameter", submitted for IEEE Trans Electron Devices.
8. G. Giusi et al., "Comparative Study of Drain and Gate Low-Frequency Noise in nMOSFETs with Hafnium-Based Gate Dielectrics", IEEE Trans. Electron Devices, vol. 53, n. 4, pp. 823-828, 2006.
9. M. Houssa et al., "Electrical properties of high-k gate dielectrics: challenges, current issues, and possible solutions", Material Science and Engineering, vol. 51, pp. 37-85, 2006.