Flexible ultra low power successive approximation analog-to-digital converter with asynchronous clock generator

Canadian Conference on Electrical and Computer Engineering

Volumn , Issue , 2007, Pages 1649-1652

  Długosz, Rafał ^a,b,d   Gaudet, Vincent ^b   Iniewski, Kris ^c  

^a UNIVERSITY OF NEUCHÂTEL   (Switzerland)

^b UNIVERSITY OF ALBERTA   (Canada)

^c CMOS Emerging Technologies Inc   (Canada)

^d European Union   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; APPROXIMATION THEORY; DATA PROCESSING; DIGITAL ARITHMETIC; DIGITAL TO ANALOG CONVERSION; ELECTRIC CLOCKS; ENERGY CONSERVATION; MULTICARRIER MODULATION; POLYNOMIAL APPROXIMATION; SENSOR NETWORKS; SENSORS; WIRELESS SENSOR NETWORKS;

ANALOG TO DIGITAL CONVERTER (ADC); ANALOG-TO-DIGITAL; CHIP AREAS; CLOCK GENERATORS; CURRENT MODE (CM); ELECTRICAL AND COMPUTER ENGINEERING (ECE); POWER SAVING MODE (PSM); SAMPLING FREQUENCIES; SUCCESSIVE APPROXIMATION (SA); ULTRA LOW POWER (ULP); WIDE-RANGE; WIRELESS SENSOR NETWORK (WNS);

CLOCKS;

EID: 48749112344     PISSN: 08407789     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CCECE.2007.412     Document Type: Conference Paper

References (8)

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