A novel placement algorithm for symmetrical FPGA

ASICON 2007 - 2007 7th International Conference on ASIC Proceeding

Volumn , Issue , 2007, Pages 1281-1284

  Wenyao, Xu ^a   Kejun, Xu ^a   Xinmin, Xu ^a  

^a ZHEJIANG UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ANNEALING; APPLICATION SPECIFIC INTEGRATED CIRCUITS; BIOELECTRIC PHENOMENA; CELLULAR AUTOMATA; CONTROL THEORY; DIESEL ENGINES; ELECTRIC POWER SUPPLIES TO APPARATUS; FEEDBACK; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); GENETIC ALGORITHMS; HEURISTIC METHODS; HEURISTIC PROGRAMMING; MICROELECTRONICS; OPTIMIZATION; SIMULATED ANNEALING;

ANT-COLONY OPTIMIZATION; BENCHMARK CIRCUITS; CAD FLOW; DECISION POLICY; FPGA PLACEMENT; GENETIC ALGORITHM (GA); INTERNATIONAL CONFERENCES; META-HEURISTIC ALGORITHMS; METAHEURISTIC APPROACHES; NORTH CAROLINA; PLACEMENT ALGORITHMS; POSITIVE FEEDBACK; SWARM INTELLIGENCE;

HEURISTIC ALGORITHMS;

EID: 48349116471     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICASIC.2007.4415870     Document Type: Conference Paper

References (3)

1. M. Yang, etc, Proc. of IEEE PhD Research in Micro-electronics and Electronics (PRIME'05), An Evolutionary Approach for Symmetrical FPGA Placement, pp. 143-146, 2005
2. M. Yang, etc, Journal of Electronics, FPGA Placement Optimization by Two-Step Unified Genetic Algorithm and Simulated Annealing Algorithm, pp.632-636, Oct. 2005.
3. V. Betz, J. Rose, and A. Marquardt, Architecture and CAD for Deep-Submicron FPGAs. Boston: Kluwer Academic Publishers, 1999