Multiple-precision subword-parallel multiplier using correction-value merging technique

ASICON 2007 - 2007 7th International Conference on ASIC Proceeding

Volumn , Issue , 2007, Pages 48-51

  Yan, Sun ^a   Lanfei, Dong ^b   Daheng, Yue ^a   Shaoqing, Li ^a   Minxuan, Zhang ^a  

^a NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY   (China)

^b Qingdao Mesnac Co Ltd   (China)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; ELECTRIC POWER SUPPLIES TO APPARATUS; MERGING;

CMOS PROCESSING; CRITICAL PATH DELAYS; INTERNATIONAL CONFERENCES; LAYOUT AREA; MULTIPLICATION OPERATIONS; SUBWORD;

FREQUENCY MULTIPLYING CIRCUITS;

EID: 48349091717     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICASIC.2007.4415564     Document Type: Conference Paper

References (7)

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