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Volumn 41, Issue 7, 2008, Pages 40-46

Warp processing: Dynamic translation of binaries to FPGA circuits

Author keywords

Dynamic synthesis; Embedded systems; FPGA; Just in time compilation; Reconfigurable computing; Warp processing

Indexed keywords


EID: 48249084289     PISSN: 00189162     EISSN: None     Source Type: Trade Journal    
DOI: 10.1109/MC.2008.240     Document Type: Article
Times cited : (71)

References (12)
  • 1
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    • Reconfigurable Computing: A Survey of Systems and Software
    • K. Compton and S. Hauck, "Reconfigurable Computing: A Survey of Systems and Software," ACM Computing Surveys, vol. 34, no. 2, 2002, pp. 171-210.
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    • Compton, K.1    Hauck, S.2
  • 2
    • 36949017390 scopus 로고    scopus 로고
    • Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable
    • IEEE Press
    • B.A. Levine and H.H. Schmit, "Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable," Proc. Symp. FPGAs for Custom Computing Machines (FCCM 03), IEEE Press, 2003, pp. 101-110.
    • (2003) Proc. Symp. FPGAs for Custom Computing Machines (FCCM 03) , pp. 101-110
    • Levine, B.A.1    Schmit, H.H.2
  • 3
    • 27544482359 scopus 로고    scopus 로고
    • An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors
    • IEEE Press
    • N. Clark et al., "An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors," Proc. Int'l Symp. Computer Architecture (ISCA 05), IEEE Press, 2005, pp. 272-283.
    • (2005) Proc. Int'l Symp. Computer Architecture (ISCA 05) , pp. 272-283
    • Clark, N.1
  • 4
    • 0033889996 scopus 로고    scopus 로고
    • Dynamic and Transparent Binary Translation
    • Mar
    • M. Gschwind et al., "Dynamic and Transparent Binary Translation," Computer, Mar. 2000, pp. 54-59.
    • (2000) Computer , pp. 54-59
    • Gschwind, M.1
  • 5
    • 0003051812 scopus 로고
    • Wisconsin Architectural Research Tool Set
    • M.D. Hill et al., "Wisconsin Architectural Research Tool Set," ACM SIGARCH Computer Architecture News, vol. 21, no. 4, 1993, pp. 8-10.
    • (1993) ACM SIGARCH Computer Architecture News , vol.21 , Issue.4 , pp. 8-10
    • Hill, M.D.1
  • 6
    • 0033905645 scopus 로고    scopus 로고
    • UQBT: Adaptable Binary Translation at Low Cost
    • Mar
    • C. Cifuentes and M. Van Emmerik, "UQBT: Adaptable Binary Translation at Low Cost," Computer, Mar. 2000, pp. 60-66.
    • (2000) Computer , pp. 60-66
    • Cifuentes, C.1    Van Emmerik, M.2
  • 10
    • 27644517741 scopus 로고    scopus 로고
    • G. Stitt et al., Hardware/Software Partitioning of Software Binaries: A Case Study of H.264 Decode, Proc. Int'l Conf. Hardware/Software Codesign and System Synthesis (CODES/ISSS 05), ACM Press, 2005, pp. 285-290.
    • G. Stitt et al., "Hardware/Software Partitioning of Software Binaries: A Case Study of H.264 Decode," Proc. Int'l Conf. Hardware/Software Codesign and System Synthesis (CODES/ISSS 05), ACM Press, 2005, pp. 285-290.
  • 12
    • 38849168762 scopus 로고    scopus 로고
    • Thread Warping: A Framework for Dynamic Synthesis of Thread Accelerators
    • CODES/ISSS 07, ACM Press
    • G. Stitt and F. Vahid, "Thread Warping: A Framework for Dynamic Synthesis of Thread Accelerators," Proc. Int'l Conf. Hardware/ Software Codesign and System Synthesis (CODES/ISSS 07), ACM Press, 2007, pp. 93-98.
    • (2007) Proc. Int'l Conf. Hardware/ Software Codesign and System Synthesis , pp. 93-98
    • Stitt, G.1    Vahid, F.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.