Through wafer via technology for MEMS and 3D integration

Proceedings of the IEEE/CPMT International Electronics Manufacturing Technology (IEMT) Symposium

Volumn , Issue , 2007, Pages 286-289

  Rimskog, Magnus ^a  

^a Silex Microsystems   (United States)

Author keywords

3d interconnect; CMOS integration; Interposer; Through silicon via; Wafer level packaging

Indexed keywords

3-D INTEGRATION; 3D INTERCONNECT; CMOS INTEGRATION; CONSUMER MARKETS; DIE SIZE; ELECTRONICS MANUFACTURING; INTERPOSER; MEMS INDUSTRY; MICRO-FLUIDIC DEVICES; OPTICAL MEMS; POTENTIAL USERS; THICK SUBSTRATES; THROUGH SILICON VIA; WAFER LEVEL PACKAGING;

CHIP SCALE PACKAGES; COMPOSITE MICROMECHANICS; ELECTRONIC EQUIPMENT MANUFACTURE; MEMS; MICROELECTROMECHANICAL DEVICES; NANOFLUIDICS; NONMETALS; OPTICAL SENSORS; SILICON; SILICON WAFERS; STANDARDS; TECHNOLOGY;

ELECTRONICS PACKAGING;

EID: 48149109434     PISSN: 10898190     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEMT.2007.4417078     Document Type: Conference Paper

References (1)

1. Edvard Kälvesten, Thorbjórn Ebefors, Niklas Svedin, Pelle Rangsten, Tommy Schönberg, "Elektriska anslutningar i substrat / Electrical connections in substrates", Swedish Patent No. : 0300784. Several parallel International patent application publications (in English) e.g. WO2004084300 published 30.09.2004, as well as other patent applications within SILEX Via technology patent portfolio are available through different patent databases).