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Volumn , Issue , 2007, Pages 165-170

Exploiting hardware and software low power techniques for energy efficient co-scheduling in dynamically reconfigurable systems

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SOFTWARE; ELECTRIC POWER UTILIZATION; ENERGY EFFICIENCY; HARDWARE; SCHEDULING;

EID: 48149083300     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2007.4380642     Document Type: Conference Paper
Times cited : (6)

References (13)
  • 1
    • 84962312624 scopus 로고    scopus 로고
    • Hardware-software co-synthesis of low power real-time distributed embedded systems with dynamically reconfigurable FPGAs
    • IEEE Computer Society Press, January
    • L. Shang and N. K. Jha, "Hardware-software co-synthesis of low power real-time distributed embedded systems with dynamically reconfigurable FPGAs," in Proc. of the International Conference on VLSI Design. IEEE Computer Society Press, January 2002, pp. 345-352.
    • (2002) Proc. of the International Conference on VLSI Design , pp. 345-352
    • Shang, L.1    Jha, N.K.2
  • 2
    • 84997196860 scopus 로고    scopus 로고
    • Blocking-aware processor voltage scheduling for real-time tasks
    • May
    • F. Zhang and S. T. Chanson, "Blocking-aware processor voltage scheduling for real-time tasks," ACM Transactions on Embedded Computing Systems, vol. 3, no. 2, pp. 307-335, May 2004.
    • (2004) ACM Transactions on Embedded Computing Systems , vol.3 , Issue.2 , pp. 307-335
    • Zhang, F.1    Chanson, S.T.2
  • 3
    • 16244395784 scopus 로고    scopus 로고
    • Configuration bitstream compression for dynamically reconfigurable FPGAs
    • IEEE Computer Society Press, November
    • J. H. Pan, T. M. Weng, and F. Wong, "Configuration bitstream compression for dynamically reconfigurable FPGAs," in International Conference on Computer Aided Design (ICCAD). IEEE Computer Society Press, November 2004, pp. 766-773.
    • (2004) International Conference on Computer Aided Design (ICCAD) , pp. 766-773
    • Pan, J.H.1    Weng, T.M.2    Wong, F.3
  • 4
    • 84949777938 scopus 로고    scopus 로고
    • Configuration caching management techniques for reconfigurable computing
    • IEEE Computer Society Press, April
    • Z. Li, K. Compton, and S. Hauck, "Configuration caching management techniques for reconfigurable computing," in Proc. of the IEEE Symposium on FPGAs for Custom Computing Machines. IEEE Computer Society Press, April 2000, pp. 87-96.
    • (2000) Proc. of the IEEE Symposium on FPGAs for Custom Computing Machines , pp. 87-96
    • Li, Z.1    Compton, K.2    Hauck, S.3
  • 5
    • 33646940730 scopus 로고    scopus 로고
    • A hybrid prefetch scheduling heuristic to minimize at run-time the reconfiguration overhead of dynamically reconfigurable hardware
    • IEEE Computer Society Press, March
    • J. Resano, D. Mozos, and F. Catthoor, "A hybrid prefetch scheduling heuristic to minimize at run-time the reconfiguration overhead of dynamically reconfigurable hardware," in Proc. of the Conference on Design, Automation and Test in Europe, vol. 1. IEEE Computer Society Press, March 2005, pp. 106-111.
    • (2005) Proc. of the Conference on Design, Automation and Test in Europe , vol.1 , pp. 106-111
    • Resano, J.1    Mozos, D.2    Catthoor, F.3
  • 9
    • 21144456346 scopus 로고    scopus 로고
    • Run-time minimization of reconfiguration overhead in dynamically reconfigurable systems
    • Proc. of the 13th International Conference Field-Programmable Logic and Applications FPL, Springer Verlag, September
    • J. Resano, D. Mozos, D. Verkest, S. Vernalde, and F. Catthoor, "Run-time minimization of reconfiguration overhead in dynamically reconfigurable systems," in Proc. of the 13th International Conference Field-Programmable Logic and Applications (FPL), ser. LNCS, vol. 2778. Springer Verlag, September 2003, pp. 585-594.
    • (2003) ser. LNCS , vol.2778 , pp. 585-594
    • Resano, J.1    Mozos, D.2    Verkest, D.3    Vernalde, S.4    Catthoor, F.5
  • 10


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.