A fault current limiter based on an LC resonant circuit: Design, scale model and prototype field tests

2007 iREP Symposium- Bulk Power System Dynamics and Control - VII, Revitalizing Operational Reliability

Volumn , Issue , 2007, Pages

  Sarmiento, Hector G ^a  

^a INSTITUTO DE INVESTIGACIONES ELÉCTRICAS   (Mexico)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 47949107650     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IREP.2007.4410570     Document Type: Conference Paper

References (9)

1. Schmitt, H., "Fault Current Limiters Report on the Activities of CIGRE WG A3.16", paper 1-4244-0493-2/06, IEEE 2006 General Meeting, Montreal, Can., July 2006.
2. Martini, L., M. Arcos, M. Bocchi, R. Dalessandro, V. Rossi, "Design, Modeling and Testing of Resistive Fault Current Limiter Prototypes Based on High Temperature Superconductors", paper D1-302, CIGRE 2006.
3. Duggan, P., "Integration Issues for Fault Current Limiters and Other New Technologies- a utility perspective", IEEE 2006 General Meeting, Montreal, Can., July 2006
4. Chang, C.S. and P.C. Loh, "Design Synthesis of Resonant Fault Current Limiter for Voltage Sag Mitigation and Current Limitation", IEEE paper 0-7803-5938-0/00, 2000.
5. Slade, P.G., "The Utility Requirements for a Distribution Fault Current Limiter", IEEE Trans. on Power Delivery, Vol.8, No.3, July 1993, pp.1155-1164.
6. CIGRE WG A3.10: "Fault Current Limiters in Electrical Medium and High Voltage Systems", CIGRE Technical Brochure No. 239, 2003
7. Karady, G.G., "Principles of Fault Current Limitation by a Resonant LC Circuit", IEE Proceedings. Vol. 139, No.1, January 1992, pp. 1-6.
8. Sarmiento, H.G., C Tovar, and E. Molero, "A Feasibility Study for a Fault Current Limiter to Reduce Voltage Sags at Sensible Loads", Conference Record of the 1995 IEEE I&CP Technical Conf., Publication 95CH35747, pp.99-104.
9. Ferracci, Ph., Ferroresonance, Cahier Techniques #190, Groupe Schneider, ECT 190, issued March 1998.