Introducing the modeling and verification process in SysML

IEEE International Conference on Emerging Technologies and Factory Automation, ETFA

Volumn , Issue , 2007, Pages 344-351

  Linhares, Marcos V ^a   De Oliveira, Rómulo S ^a   Fariness, Jean Marie ^a   Vernadat, François ^b  

^a FEDERAL UNIVERSITY OF SANTA CATARINA   (Brazil)

^b UNIVERSITÉ DE TOULOUSE   (France)

Author keywords

[No Author keywords available]

Indexed keywords

AND VERIFICATIONS; COMPLEX SYSTEMS; DEVELOPMENT PROCESSES; DO-MAINS; FACTORY AUTOMATION SYSTEMS; FORMAL VERIFICATIONS; MODELING LANGUAGES; SYSTEM BEHAVIORS; SYSTEM DESCRIPTIONS; SYSTEM STRUCTURES;

FACTORY AUTOMATION; GRAPH THEORY; LARGE SCALE SYSTEMS; LINGUISTICS; MARINE BIOLOGY; PETRI NETS; SEMICONDUCTOR QUANTUM DOTS; SYSTEMS ANALYSIS; TEMPORAL LOGIC;

AUTOMATION;

EID: 47849103825     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EFTA.2007.4416788     Document Type: Conference Paper

References (10)

1. R. Alur and D. L. Dill. A theory of timed automata. Theoretical Computer Science, 126(2): 183-235, 1994.
2. B. Berthomieu and M. Diaz. Modeling and verification of time dependent systems using time Petri nets. IEEE Transactions on Software Engineering, 17(3):259-273, Mar. 1991.
3. B. Berthomieu and M. Menasche. A state enumeration approach for analyzing time Petri nets. In Proc. Applications and Theory of Petri Nets (ATPN'82), Como, Italy, pages 27-56, 1982.
4. B. Berthomieu, P.-O. Ribet, and F. Vernadat. The tool TINA - construction of abstract state spaces for Petri nets and time P etri nets. International Journal of Production Research, 42(14):2741-2756, 15 July 2004.
5. B. Berthomieu and F. Vernadat. State class constructions for branching analysis of time Petri nets. In Proc. Tools and Algorithms for the Construction and Analysis of Systems (TACAS'2 003), Warsaw, Poland, Springer LNCS 2619, pages 442-457, 2003.
6. S. Chaki, M. E, Clarke, J. Ouaknine, N. Sharygina, and N. Sinha. State/event-based software model checking. In 4th International Conference on Integrated Formal Methods (IFM'04), Springer LNCS 2999, pages 128-147, apr 2004.
7. S. Edwards, L. Lavagno, E. Lee, , and A. SangiovanniVincentelli. Design of embedded systems: formal models, validation and synthesis. Proceedings of the IEEE, March 1997.
8. P. M. Merlin and D. J. Farber. Recoverability of communication protocols: Implications of a theoretical, study. IEEE Trans. Comm., 24(9): 1036-1043, Sept. 1976.
9. SEDSIG. Systems Engineering Domain Special Interest Group. http://syseng.omg.org/, March 2006.
10. SysML Merge Team (SMT). Systems Modeling Language (SysML) Specification, version 1.0. Object Manegement Group (OMG), April 2006.