FastForward for efficient pipeline parallelism

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 2007, Pages 407-

  Giacomoni, John ^a   Moseley, Tipp ^a   Vachharajani, Manish ^a  

^a UNIVERSITY OF COLORADO   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

PARALLEL PROCESSING SYSTEMS; PIPELINES; QUEUEING THEORY; TURBO CODES;

COMPILATION TECHNIQUES; DOMAIN-SPECIFIC; HIGH RATES; INTERNATIONAL CONFERENCES; LOCK-FREE; LOW-LATENCY; MULTI-CORE ARCHITECTURE; OPTERON; PARALLEL ARCHITECTURES; PARALLEL SOFTWARES;

SOFTWARE ARCHITECTURE;

EID: 47849103215     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PACT.2007.37     Document Type: Conference Paper

References (2)

1. J. Giacomoni, T. Moseley, and M. Vachharajani. FastForward for efficient pipeline parallelism. Technical Report CU-CS-1028-07, Univerity of Colorado at Boulder, 2007.
2. L. Lamport. Specifying concurrent program modules. ACM Trans. Program. Lang. Syst., 5(2):190-222, 1983.