Fully adaptive fault-tolerant routing algorithm for network-on-chip architectures

Proceedings - 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007

Volumn , Issue , 2007, Pages 527-534

  Schönwald, Timo ^a   Zimmermann, Jochen ^a   Bringmann, Oliver ^a   Rosenstiel, Wolfgang ^b  

^a FZI RESEARCH CENTER FOR INFORMATION TECHNOLOGY   (Germany)

^b UNIVERSITY OF TÜBINGEN   (Germany)

Author keywords

Adaptive routing; Fault tolerant; Network on chip; Traffic balancing; Wormhole routing

Indexed keywords

ADAPTIVE ALGORITHMS; ARCHITECTURAL DESIGN; BIOLOGICAL MATERIALS; COMPUTER NETWORKS; ELECTRIC NETWORK TOPOLOGY; METROPOLITAN AREA NETWORKS; MICROPROCESSOR CHIPS; PACKET SWITCHING; ROUTERS; SYSTEMS ANALYSIS; TELECOMMUNICATION NETWORKS;

ADAPTIVE-ROUTING; FAULT-TOLERANT; NETWORK-ON-CHIP; TRAFFIC-BALANCING; WORMHOLE-ROUTING;

ROUTING ALGORITHMS;

EID: 47749105636     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2007.4341518     Document Type: Conference Paper

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