A high speed, low voltage to high voltage level shifter in standard 1.2V 0.13μm CMOS

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn , Issue , 2006, Pages 668-671

  Serneels, Bert ^a   Steyaert, Michiel ^a   Dehaene, Wim ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS TECHNOLOGIES; DESIGN RULES; HIGH SPEEDS; HIGH VOLTAGE LEVEL; HOT CARRIER DEGRADATION; INPUT SIGNALS; INTERNATIONAL CONFERENCES; LEVEL SHIFTERS; LOW-VOLTAGE (LV); MAINSTREAM (MS); OUTPUT SIGNALS; OXIDE STRESS; SUPPLY VOLTAGES; VOLTAGE LIMITS;

DC GENERATORS; INTERCONNECTION NETWORKS; MOSFET DEVICES; SPEED; STANDARDS; SULFATE MINERALS;

TECHNOLOGY;

EID: 47349111063     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2006.379877     Document Type: Conference Paper

References (5)

1. A.-J. Annema, G. Geelen, and P. de Jong, "5.5 V I/O in a 2.5 V 0.25μm CMOS technology," IEEE J. Solid-State Circuits, vol. 36, no. 3, pp. 528-538, 2001.
2. B. Serneels, T. Piessens, M. Steyaert, and W. Dehaene, "A high-voltage output driver in a standard 2.5V 0.25μm CMOS technology," in ISSCC Digest of Technical Papers, Feb. 2004, pp. 146-147.
3. B. Serneels, M. Steyaert, and W. Dehaene, "A 5.5V line driver in a standard 1.2V 0.13μm CMOS technology," in Proceedings European Solid-State Circuits Conference, Sept. 2005, pp. 303-306.
4. J. M. Rabaey, Digital Integrated Circuits, A Design Perspective. PrenticeHall, Inc., 1996.
5. H. J. Veendrick, "Short circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits," IEEE J. Solid-State Circuits, vol. 19, no. 4, pp. 468-473, Aug. 1984.