Quantifying effective memory bandwidth of platform FPGAs

Proceedings 2007 IEEE Symposium on Field-Programme Custom Computing Machines, FCCM 2007

Volumn , Issue , 2007, Pages 337-338

  Schmidt, Andrew G ^a   Sass, Ron ^b  

^a UNIVERSITY OF KANSAS   (United States)

^b UNIVERSITY OF NORTH CAROLINA AT CHARLOTTE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 47349094120     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2007.47     Document Type: Conference Paper

References (8)

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3. B. Donchev, G. Kuzmanov, and G. N. Gaydadjiev. External memory controller for virtex ii pro. In in Proceedings of International Symposium on System-on-Chip 2006, pages 37-40, November 2006.
4. IBM. Url: http://www-03.ibm.com/chips/products/coreconnect/, June 2004.
5. E. Joseph, A. Snell, and C. G. Willard. Council on competitiveness study of U.S. industrial HPC users.
6. J. Noseworthy and M. Leeser. Efficient use of communications between an fpgas embedded processor and its reconfigurable logic. In ERSA, pages 191-197, 2006.
7. A. G. Schmidt. Quantifying effective memory bandwidth in platform fpgas. Master's thesis, University of Kansas, May 2007.
8. W. A. Wulf and S. A. McKee. Hitting the memory wall: Implications of the obvious. Computer Architecture News, 23(1):20-24, 1995.