Novel thin sidewall structure for high performance bulk CMOS with charge-assisted source-drain-extension

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2007, Pages 120-121

  Ohta, H ^a   Fukutome, H ^a   Sakuma, T ^a   Hatada, A ^a   Ohkoshi, K ^a   Ikeda, K ^a   Miyashita, T ^a   Mori, T ^a   Sugii, T ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BULK CMOS; COMPLEMENTARY METAL OXIDE SEMICONDUCTORS (CMOS) DEVICES; DRIVE CURRENTS; ELECTRICAL CHARGING; PARASITIC RESISTANCES; SATURATION CURRENTS; SHORT-CHANNEL EFFECT (SCE); SOURCE-DRAIN; VLSI TECHNOLOGIES;

HEALTH;

EID: 47249146437     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2007.4339751     Document Type: Conference Paper

References (6)

1. T. Ghani et al.: IEDM Tech. Dig., pp. 978-980, 2003.
2. H. Ohta et al.: IEDM Tech. Dig., pp. 247-250, 2005.
3. S. Han et al.: IEEE Tran. Electron Devices 48, pp. 2058, 2001.
4. T. Mizuno et al. : IEEE Tran. Electron Devices 41, pp. 2216, 1994.
5. H. Ohta et al.: VLSI Tech., pp. 222-223, 2006.
6. H. Fukutome et al.: VLSI Tech., pp. 140-141, 2005.