Integration friendly dual metal gate technology using dual thickness metal inserted poly-Si stacks (DT-MIPS)

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2007, Pages 196-197

  Jung, Hyung Suk ^a   Han, Sung Kee ^a   Lim, Hajin ^a   Choi, Yun Ki ^a   Lee, Cheol Kyu ^a   Lee, Mong Sub ^a   You, Ng Sub ^a   Chung, Youngsu ^b   Park, Jong Bong ^b   Lee, Eun Ha ^b   Baik, Hion Suck ^b   Lee, Jong Ho ^a   Lee, Nae In ^a   Kang, Ho Kyu ^a  

^a SAMSUNG Electronics   (South Korea)

^b Samsung Advanced Institute of Technology (SAIT)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

PLASMA WAVES; POLYSILICON; SILICON; TECHNOLOGY;

DUAL METAL GATE; METAL LAYERS; POLY-SI; VLSI TECHNOLOGIES;

METALS;

EID: 47249083365     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2007.4339690     Document Type: Conference Paper

References (7)

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7. M.Aoulaiche, et al., Proc. of IRPS., p317, 2006