A quantitative study on layer-2 packet processing on a general purpose processor

Proceedings of the International Conference on Microelectronics, ICM

Volumn , Issue , 2006, Pages 218-221

  Salehi, Mostafa E ^a   Rafati, Ramin ^a   Baharvand, Farshad ^a   Fakhraie, Sied Mehdi ^a  

^a UNIVERSITY OF TEHRAN   (Iran)

Author keywords

Layer 2 switching; Network processors; Packet processing

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; ELECTRONICS INDUSTRY; EMBEDDED SYSTEMS; MICROELECTRONICS; PACKET NETWORKS;

APPLICATION SPECIFIC INSTRUCTION PROCESSOR (ASIP); GENERAL PURPOSE PROCESSOR (GPP); INSTRUCTION-LEVEL; INTERNATIONAL CONFERENCES; PACKET PROCESSING; QUANTITATIVE STUDY; RISC PROCESSOR (RAWE); SWITCHING APPLICATIONS;

REDUCED INSTRUCTION SET COMPUTING;

EID: 46749090471     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICM.2006.373306     Document Type: Conference Paper

References (5)

1. Intel Corporation. December 2001, IXP1200 Network Processor Datasheet, [Online]. Available: http://www.intel.com/design/network/datashts/278298.htm
2. Intel Corporation. December 2001. IXP1250 Network Processor Datasheet, [Online]. Available: http.//www.intel.com/design/network/datashts/278371.htm.
3. J. Allen, B. Bass, C. Basso, R. Boivie, J. Calvignac, G. Davis, L. Frelechoux, M. Heddes, A. Herkersdorf, A. Kind, J. Logan, M. Peyravian, M. Rinaldi, R. Sabhikhi, M. Siegel, and M. Waldvogel. "IBM PowerNP network processor: Hardware, software, and applications," IBM Journal of Research and Development, vol. 47, no. 2/3, pp. 177-194, March/May 2003.
4. Freescale Semiconductor, Inc. 2005, Motorola C--5 Network Processor Data Sheet, Silicon Revision B0. [Online]. Available: http://www.datasheetcatalog. com/motorola/17/
5. Gaisler Research, 2005. [online], Available: http://www.gaisler.com/